Conventional data shift devices are known by one of ordinary skill in the art by the term barrel shift circuits (“barrel shifters”). These barrel shift circuits are based on a logarithmic architecture of multiplexers and, when they are of size N (that is to say exhibiting N inputs and N outputs), they offer a simple approach for performing a cyclic shift of N data delivered as inputs to the circuit by a bus of size N. On the other hand, when only a part of the data bus is used, that is to say when the barrel shift circuit is fed with a smaller number of inputs than N, the outputs of the barrel shift circuit, on which the shifted data are delivered, vary according to the desired shift value. Stated otherwise, the “output wires” actually used, that is to say conveying the shifted output data, are not the same, for a given bus size, depending on the shift value. This may not be advantageous when connecting another circuit downstream of the barrel shift circuit.
So, it is seen straight away that these barrel shift circuits do not offer a satisfactory approach to the hardware flexibility and hardware reconfigurability mentioned above and used in order to satisfy the emergence of different standards, unless of course one uses as many barrel shift circuits as there are sizes of bus to be envisaged, employing an appropriate selection device, or else a single barrel shift circuit exhibiting the maximum size with a complex wire routing device, downstream, that can be configured as a function of the real size of the input data bus.
Now, these two approaches exhibit a not inconsiderable surface area and/or complex routing problems.